• 74LS109 – Dual J-K Positive-edge-triggered Flip-Flops
  • Free Shipping on all Orders over Rs.999!!
  •  
  • Cash On Delivery [COD] only for order above Rs.5000/-

74LS109 – Dual J-K Positive-edge-triggered Flip-Flops

  • Product Code: IC74S_74LS109
  • Availability: In Stock
  • ₹17.80 (+ GST)

  • 10 or more quantity/sets : ₹17.37
  • 25 or more quantity/sets : ₹16.86

  • Shipping Charges Start from Rs.49*
  • Fast Order Processing <24hr
  • Shipment using reputed courier with 90% delivery in 1 - 3 working days
  • All order with GST invoice (B2B: 100% cliam GST credit input tax)

74LS109, Dual J-K Positive-edge-triggered Flip-Flops

General Description
This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the J and K inputs may be changed while the clock is HIGH or LOW as long as setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.

*Image shown is a representation only.


Note: Contact sales(at)electroncomponents.com for bulk enquiry & get best price!

Write a review

Please login or register to review